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<div class="title">TIM_OCInitTypeDef结构体 参考<div class="ingroups"><a class="el" href="group___w_b32_l003___std_periph___driver.html">WB32L003_StdPeriph_Driver</a> &raquo; <a class="el" href="group___t_i_m.html">TIM</a></div></div>  </div>
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<p>TIM Output Compare Init structure definition  
 <a href="struct_t_i_m___o_c_init_type_def.html#details">更多...</a></p>

<p><code>#include &lt;<a class="el" href="wb32l003__tim_8h_source.html">wb32l003_tim.h</a>&gt;</code></p>
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成员变量</h2></td></tr>
<tr class="memitem:afa69e616eb0b11bd238062dd8a5ceaa5"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___o_c_init_type_def.html#afa69e616eb0b11bd238062dd8a5ceaa5">TIM_OCMode</a></td></tr>
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<tr class="memitem:a1e88e3081574da1e1abc089df87985ba"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___o_c_init_type_def.html#a1e88e3081574da1e1abc089df87985ba">TIM_OutputState</a></td></tr>
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<tr class="memitem:a74a30f1a994c6676c0ce2b56243ed184"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___o_c_init_type_def.html#a74a30f1a994c6676c0ce2b56243ed184">TIM_OutputNState</a></td></tr>
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<tr class="memitem:a3f43bd9158c651d6d9fa2720ad75ab01"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___o_c_init_type_def.html#a3f43bd9158c651d6d9fa2720ad75ab01">TIM_Pulse</a></td></tr>
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<tr class="memitem:acc7066b59671f62f2696c382c879c9c8"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___o_c_init_type_def.html#acc7066b59671f62f2696c382c879c9c8">TIM_OCPolarity</a></td></tr>
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<tr class="memitem:aa392739b843a7974702c5ec71864f982"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___o_c_init_type_def.html#aa392739b843a7974702c5ec71864f982">TIM_OCNPolarity</a></td></tr>
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<tr class="memitem:afb328e9ef4de6eb9d78390d7366b9a6e"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___o_c_init_type_def.html#afb328e9ef4de6eb9d78390d7366b9a6e">TIM_OCIdleState</a></td></tr>
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<tr class="memitem:a68f0241aa8d57bb42cd8e56c153f8e48"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_i_m___o_c_init_type_def.html#a68f0241aa8d57bb42cd8e56c153f8e48">TIM_OCNIdleState</a></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">详细描述</h2>
<div class="textblock"><p>TIM Output Compare Init structure definition </p>
</div><h2 class="groupheader">结构体成员变量说明</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#afb328e9ef4de6eb9d78390d7366b9a6e">&#9670;&nbsp;</a></span>TIM_OCIdleState</h2>

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          <td class="memname">uint16_t TIM_OCIdleState</td>
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<p>Specifies the TIM Output Compare pin state during Idle state. This parameter can be a value of <a class="el" href="group___t_i_m___output___compare___idle___state.html">TIM_Output_Compare_Idle_State</a> </p><dl class="section note"><dt>注解</dt><dd>This parameter is valid only for TIM1. </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#afa69e616eb0b11bd238062dd8a5ceaa5">&#9670;&nbsp;</a></span>TIM_OCMode</h2>

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<p>Specifies the TIM mode. This parameter can be a value of <a class="el" href="group___t_i_m___output___compare__and___p_w_m__modes.html">TIM_Output_Compare_and_PWM_modes</a> </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a68f0241aa8d57bb42cd8e56c153f8e48">&#9670;&nbsp;</a></span>TIM_OCNIdleState</h2>

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<p>Specifies the TIM Output Compare pin state during Idle state. This parameter can be a value of <a class="el" href="group___t_i_m___output___compare___n___idle___state.html">TIM_Output_Compare_N_Idle_State</a> </p><dl class="section note"><dt>注解</dt><dd>This parameter is valid only for TIM1. </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#aa392739b843a7974702c5ec71864f982">&#9670;&nbsp;</a></span>TIM_OCNPolarity</h2>

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<p>Specifies the complementary output polarity. This parameter can be a value of <a class="el" href="group___t_i_m___output___compare___n___polarity.html">TIM_Output_Compare_N_Polarity</a> </p><dl class="section note"><dt>注解</dt><dd>This parameter is valid only for TIM1. </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#acc7066b59671f62f2696c382c879c9c8">&#9670;&nbsp;</a></span>TIM_OCPolarity</h2>

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<p>Specifies the output polarity. This parameter can be a value of <a class="el" href="group___t_i_m___output___compare___polarity.html">TIM_Output_Compare_Polarity</a> </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a74a30f1a994c6676c0ce2b56243ed184">&#9670;&nbsp;</a></span>TIM_OutputNState</h2>

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<p>Specifies the TIM complementary Output Compare state. This parameter can be a value of <a class="el" href="group___t_i_m___output___compare___n__state.html">TIM_Output_Compare_N_state</a> </p><dl class="section note"><dt>注解</dt><dd>This parameter is valid only for TIM1. </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#a1e88e3081574da1e1abc089df87985ba">&#9670;&nbsp;</a></span>TIM_OutputState</h2>

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<p>Specifies the TIM Output Compare state. This parameter can be a value of <a class="el" href="group___t_i_m___output___compare__state.html">TIM_Output_Compare_state</a> </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a3f43bd9158c651d6d9fa2720ad75ab01">&#9670;&nbsp;</a></span>TIM_Pulse</h2>

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<p>Specifies the pulse value to be loaded into the Capture Compare Register. This parameter can be a number between 0x0000 and 0xFFFF </p>

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<hr/>该结构体的文档由以下文件生成:<ul>
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